74LS366 Hex Buffer 3-State - (AD7274)

Description:

These devices are high-speed hexadecimal buffers with 3-state outputs. They are organized as either 6-bit or 2-bit/4-bit, with inverted or non-inverted data directions. The outputs are designed to drive 15 TTL load units or 60 Low-Power Schottky loads when the Enable (E) is low. When the output (E) is high, the outputs are forced into a high-impedance state. If the outputs of 3-state devices are tied together, all but one device must be in the high-impedance state to prevent high currents that would exceed maximum ratings.

Datasheet