CD4027BE CMOS Dual J-K Master-Slave Flip-Flop - (AD32124)

Description:

The CD4027BMS is a monolithic integrated circuit containing two identical complementary symmetry J-K master-slave flip-flops. Each flip-flop has individual J, K, Set Reset, and Clock inputs. Buffered Q and Q-bar signals are provided as outputs. This input-output arrangement permits compatibility with the Intersil CD4013B dual D-type flip-flop. The CD4027BMS is useful for performing control, register, and toggle functions. Logic levels present at the J and K inputs, together with internal self-steering, control the state of each flip-flop; changes in the flip-flop state are synchronized with the positive-going transition of the clock pulse. Set and Reset functions are independent of the clock and are initiated when a high-level signal is present at the Set or Reset input.

Datasheet