74LS148 8-Line to 3-Line Priority Encoder - (AD18017)

Description:

The SN54/74LS147 and SN54/74LS148 are priority encoders. They provide priority decoding of the inputs to ensure that only the highest-order data line is encoded. Both devices have active low data inputs and outputs.

The LS147 encodes nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition does not require an input condition, since zero is encoded when all nine data lines are at a high logic level.

The LS148 encodes eight data lines to three-line (4-2-1) binary (octal). By providing cascading circuitry (Enable Input EI and Enable Output EO), octal expansion is allowed without the need for external circuitry. The SN54/74LS748 is a Motorola proprietary part that incorporates an integrated de-glitching network which minimizes glitches on the GS output. Glitching occurs on the negative transition of the EI input when data inputs 0-7 are at logical ones.

The only differences in DC parameters between the LS148 and the LS748 are: (1) Pin 10 (input 0) has an input of 2 on the LS748, versus 1 on the LS148; (2) Pins 1, 2, 3, 4, 11, 12, and 13 (inputs 1, 2, 3, 4, 5, 6, 7) have an input of 3 on the LS748, versus 2 on the LS148. The only difference in AC is that the tPHL from EI to EO is changed from 40 to 45 ns.

Datasheet